1. Field of the Invention
The present invention relates to an in-plane switching (IPS) mode liquid crystal display (LCD) and its fabrication method, and more particularly, to an IPS mode LCD and its fabrication method capable of improving an aperture ratio, a production yield and other features.
2. Description of the Related Art
As the consumer's interest in information displays is growing and the demand for portable (mobile) information devices is increasing, research and commercialization of light and thin flat panel displays (“FPD”) have been growing.
Among FPDs, the liquid crystal display (“LCD”) is a device for displaying images by using optical anisotropy of a liquid crystal. LCD devices exhibit excellent resolution and color and picture quality, so it is widely applied for notebook computers or desktop monitors, and the like.
The LCD includes a color filter substrate, a first substrate, an array substrate, a second substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate. The color filter substrate includes a color filter including a plurality of sub-color filters that implement red, green and blue colors, a black matrix for demarcating the sub-color filters and blocking light transmitted through the liquid crystal layer, and a transparent common electrode for applying voltage to the liquid crystal layer. The array substrate includes gate lines and data lines which are arranged vertically and horizontally to define a plurality of pixel area, TFTs (thin film transistors), switching elements, formed at respective crossings of the gate lines and the data lines, and pixel electrodes formed on the pixel areas.
The color filter substrate and the array substrate are attached in a facing manner by a sealant formed at an edge of an image display region to form a liquid crystal panel, and the attachment of the color filter substrates and the array substrate is made by an attachment key formed on the color filter substrate or the array substrate.
The above-described LCD is referred as a twisted nematic (TN) mode LCD in which nematic phase liquid crystal molecules are driven in a direction perpendicular to the substrates, which has shortcomings in that its viewing angle is quite narrow, about 90°. This results from refractive anisotropy of liquid crystal molecules because when voltage is applied to a liquid crystal display panel, liquid crystal molecules which have been aligned horizontally to the substrates become aligned substantially in the vertical direction to the substrates.
Thus, an in-plane switching (IPS) mode LCD, in which liquid crystal molecules are driven in a horizontal direction to the substrates to thereby improve the viewing angle by more than 170°, has been proposed. The IPS mode LCD is described as follows.
FIG. 1 is a plan view showing a portion of an array substrate of the related art IPS mode LCD. The N number of gate lines and the M number of data lines are formed to cross each other to define the M×N number of pixels on an array substrate. However, only one pixel is shown on the drawing merely for the sake of brevity. FIG. 2 is an exemplary view showing a section take along the line I-I′ of the array substrate in FIG. 1, in which the array substrate and the color filter substrate attached to the array substrate are shown together.
As shown in FIGS. 1 and 2, a gate line 16 and a data line 17 are formed vertically and horizontally to define a pixel region on the transparent array substrate 10, and a TFT (T), a switching element, is formed at the crossing of the gate line 16 and the data line 17. The TFT (T) includes a gate electrode 21 connected with a gate line 16, a source electrode 22 connected with the data line 17 and a drain electrode 23 connected with a pixel electrode 18 via a pixel electrode line 18I. The TFT also includes a first insulation film 15a for insulating the gate electrode 21 and the source and drain electrodes 22 and 23 and an active pattern 24 for forming a conductive channel between the source electrode 22 and the drain electrode 23 by a gate voltage supplied to the gate electrode 21. For reference, reference numeral 25 denotes an ohmic-contact layer for allowing source and drain regions of the active pattern 24 to ohmic-contact with the source and drain electrodes 22 and 23.
In the pixel region, a common line 8I and a storage electrode 18s are arranged in a direction parallel to the gate line 16, and a plurality of common electrodes 8 and a plurality of pixel electrodes 18 are arranged to be parallel to the data line 17. Here, the storage electrodes 18s and the common electrodes 8 generate an in-plane field 90 to switch liquid crystal molecules 30. The plurality of common electrodes 8 are simultaneously formed with the gate line 16 and connected with the common line 8I, and the plurality of pixel electrodes 18 are simultaneously formed with the data line 17 and connected with the pixel electrode line 18I and the storage electrode 18s. Further, pixel electrodes 18 connected with the pixel electrode line 18I is electrically connected with the drain electrode 23 of the TFT (T) via the pixel electrode line 18I. The storage electrode 18s overlaps with a portion of the lower common line 8I with the first insulation film 15a interposed between the storage electrode 18s and the lower common line 8I to form a storage capacitor Cst.
On the transparent color filter substrate 5, there are formed a black matrix 6 for preventing a leakage of light to the TFT (T), the gate line 16 and the data line 17, and a color filter 7 for implementing red, green and blue colors. An alignment film (not shown) for determining an initial alignment direction of the liquid crystal molecules 30 is coated on the facing surfaces of the array substrate 10 and the color filter substrate 5.
In the related art in-plane mode LCD with such a structure, the common electrodes 8 and the pixel electrodes 18 are formed on the same array substrate 10 to generate the in-plane field, and thus a viewing angle can be improved.
However, because the common electrodes 8 and the pixel electrodes 18 made of an opaque material are disposed in the pixel area, and in addition, the common lines 8I made of an opaque conductive material are provided, an aperture ratio is degraded, thus degrading luminance.
In addition, because the common line 8I is formed on the layer on which the gate line 16 is formed, near the gate line 16, the common line 8I may become short-circuited with the gate line 16.